kesaripadmapriya

Dr.kesaripadmapriya

professor
Department:Electronics and Communication Engineering
Qualification:Ph.D
Phone(Office):8978244955
Mobile:9290532182
Email:kesaripadmapriya@gmail.com
Date of Birth:01/06/1974
Subjects Taught:optical communications,EDC, Digital IC applications,Structural Digital Design, HDL,optical networks,PDC, system simulation and modelling,VHDL, FPGA and CPLD arhitectures and algorithms,ECA,Mp and Mc, RF circuit design.


Research Area:Low Power VLSI
Teaching Experience:18y
Research Experience:4years
Industry/Professional Experience:
Staff Image
Workshops/Courses Attended:1. Attended a three days workshop on “Outcome Based Education and Accreditation”, 8-10, june,2016 conducted by NBA Nodal Centre JNTUK,University College of Engineering, Kakinada.
2. Attended a two day workshop on “Advance Microcontrollers with Arduino (NW-AMC2015)” 23-24, July 2015, JNTUK College of Engineering, Kakinada.
3. Attended a one day workshop on “Awakening women” JNTUK University College of Engineering, Vizianagaram, 6’th March, 2014.
4. Attended a two day workshop on “VLSI & EDA Tools (VLSI-2014)” JNTUK University College of Engineering, Vizianagaram during 6’th-7’th, February 2014.
5. Attended a one day workshop on “Workshop for Training Resource Persons on Outcome Based Accreditation Phase-I”, 29-04-2013 conducted by NBA Nodal Centre JNTUK,University College of Engineering, Kakinada.
6. Attended a three days workshop on “Workshop for Training Resource Persons on Outcome Based Accreditation Phase-II”, 16’th-18’th May,2013 conducted by NBA Nodal Centre JNTUK,University College of Engineering, Kakinada.
7. Attended a three days “Faculty Development Programme” 13’th-15’th,June, 2013 in JNTUK, University College of Engineering, Vizianagaram.
8. Attended a two days national workshop on “Communication, Signal & Image Processing (COSIP-2013) during 28’th &29’th June, 2013 in JNTUK, University College of Engineering, Vizianagaram.
9. Attended a two days “Orientation Programme for Faculty” 16’th-17’th,June, 2013 in JNTUK,University College of Engineering, Vizianagaram.
10. Attended a one day workshop on “Workshop for Training Resource Persons on Outcome Based Accreditation Phase-I”, 13-09-2013 conducted by NBA Nodal Centre JNTUK,University College of Engineering, Vizianagaram.
11. Attended a three days workshop on “ Workshop for Training Resource Persons on Outcome Based Accreditation Phase-II”, 26’th-28’th Sep,2013 conducted by NBA Nodal Centre JNTUK,University College of Engineering, Vizianagaram.
12. Attended a one day workshop on “Complementary Domains-VLSI& Embedded Systems (CDVES-13) on 30’th April 2013.
ORIENTATION COURSE ATTENDED

1. Attended orientation course from 6/6/2007 to 4/7/2007 at Academic staff College, Osmania University, Hyderabad.
Book Chapters/Books Authored:nil
Conferences:1. A.Mallaih,G.N.Swamy,K.PadmaPriya”Assymetric Molecular Diode energy calculation using extended Huckel and Parametric method” Nano systems physics, chemistry mathematics, 2016, Vol7(3),pp 569-574.
2. A.Mallaih,G.N.Swamy,K.PadmaPriya” Observation of Terminal Atom Effect on Charge in NH2- Cn-NO2 Molecule: A Hartree- Fock Theory”, Communications on Applied Electronics (CAE) – ISSN : 2394-4714 Foundation of Computer Science FCS, New York, USA Volume 5– No. 2, May 2016.
3. K.Padmapriya,Aparna et.al.,” “Delay optimization of 32-bit carry skip adder” International Journal of Electrical and Electronics Engineering and Telecommunications, Vol. 5, No. 2, April 2016,pp.27-32.
4. W.Yasmeen,S.NagarajaRao,K.Padmapriya,”The design and optimization of UWB PHY Transreceiver IC by using CMOS Technology” International Journal of System Design and Communication Systems,Vol3,Issue 10,December 2015,pp1442-1445.(If.3.014)
5. Srinivas, Ramanaiah, K.padmapriya” Area and energy efficient Intelligent level shifter”, Research journal of Applied Sciences, Engineering and Technology, June,15, 201510(5).ISSN:2040-7459,e-ISSN 2040-7467, pp. 532-536.

6. Doddabasavana Goud.B, K.Padma Priya,” a comprehensive review on estimating the blood cell count using various Advanced techniques”, International Journal of Latest Research in Science and Technology, ISSN (Online):2278-5299Volume 4, Issue 2: Page No.103-105, March-April 2015.ISSN:2278-5299 103 (impact factor 2.51)


7. Doddabasavana Goud.B, K.Padma Priya,” Identification of RBC and WBC Count in Human Blood Using ARM Based Instrumentation” Iraq J. Electrical and Electronic Engineering, Vol.11 No.1, 2015,pp.145-150, ISSN 1814-5892 (Print), ISSN 2078-6069 (Online). 103 (impact factor 0.9)

8. K.Padmapriya,et.al” Wavelet Based Approach for Fusing Computed Tomography and Magnetic Resonance Images” International Association of Advanced Technology and Science, Vol. 16 | APRIL 2015. ISSN-4265-0578.( I.F.1.540)

9. K.Padmapriya” A Novel Energy Efficient Transmission gate Voltage Level Shifter for multi VDD systems” International Journal of scientific research and management (IJSRM), ISSN (e): 2321-3418,Volume3,Issue3,Pages 2263-2266,2015.(i.f.5.114)

10. Srinivas, Ramanaiah, K.Padmapriya” A Novel Energy Efficient Active Voltage Level Shifter”, European Journal of Scientific Research, ISSN 1450-216X / 1450-202X Vol. 128 No 4 January, 2015, pp. 308-314.(i.f. 0.736)
11. Doddabasavana Goud.B, K.Padma Priya” Advanced Instrumentation System Using ARM Controller for Blood Analysis” International Journal of Scientific & Engineering Research, Volume 5, Issue 9, September-2014, ISSN 2229-5518.pp:212-216.)(i.f.3.2)

12. V.Madhurima, K.Padmapriya”A Survey on Static Power Reduction Techniques in Asynchronous Circuits”,IOSR Journal of VLSI and Signal Processing, Vo 4, Issue 4,VerI, (Jul-Aug 2014),pp 64-69.(i.f.1.359)

13. Doddabasavana Goud.B, K.Padma Priya”A Simple Instrumentation System for Seperation of whole blood components using centrifuge technique and measurement of RBC” International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308,pp.1-5Volume: 03 Special Issue: 03 | May-2014 | NCRIET-2014.(i.f.3.127)

14. K Padma Priya, P Sai Arun Kumar,B Mounika,P Lavanya,D Sivananda Das,and B Buchi Babu” Review on optimization techniques of Wallace tree multiplier” International Journal of Electrical &Electronics Engineering and Telecommunications, ISSN 2319 – 2518,Vol. 3, No. 2, April 2014,pp.32-40. .(i.f.0.384)

15. A.Mallaih,,P.Rupeshkumar,K.PadmaPriya,”Low Power Design of 8bit adder in MTCMOS circuit using Tri mode Technique” International Journal of Information and Computing Technology, Volume 4, No.1,2014, pp15-21.ISSN-0794-2239. (I.F.1.85)
16. K.Padmapriya” Analysis of wire redundancy in Bus encoding Techniques for Deep Sub Micron Technology-A Review”, International Journal of Electrical and Electronics Engineering and Telecommunications, April 2013 issue, ISSN: 2319-2518.pp41-47.(i.f.0.384)

17. Doddabasavana Goud.B, K.Padma Priya” A General Review of Practical Centrifuges Used to Detect RBC & WBC Count Values” International Journal of Electrical and Electronics Engineering and Telecommunications, April 2013 issue, ISSN: 2319-2518.pp 17-26.(i.f.0.384)

18. Srinivas, Ramanaiah, K.padmapriya” Low Power Energy Efficient CMOS Voltage Level Shifter for Multi VDD Systems” International Journal of Electrical and Electronics Engineering and Telecommunications, April 2013 issue, ISSN: 2319-2518.pp.33-40.(i.f.0.384)

19. P.Ramesh, Dr.V.Usha shree, Dr.K.Padma priya,”A Novel Inaudible Audio Watermarking with Binary Image as Watermark using DWT”, International Journal Data& Network Security,ISSN 2319-1236,Vol4,No.1,pp.168-173,October 2013. (I.F. 0.465)

20. K. Padma Priya Ph.D, C. Lakshmi Charitha, G.Ram Mohan, S. Lakshmi Kanth Reddy,”Built in Self test for Multi error detection in motion estimation computing arrays”, IOSR Journal of VLSI and Signal Processing, Vol 3,Issue 2,pp23-29,Sep-Oct,2013.(i.f..1.359)

21. S.SaiKrishna,K.Padmapriya,”High Speed and Low Error Fixed Width Modified Booths Multipliers for DSP Applications”,ISSN 2319-885, International Journal of scientific Engineering and Technology Research, Vol 2, Issue 8, Aug 2013,pp.745-751.(I.F.3.631)

22. K.PadmaPriya,”Modified SSC method for DSM Buses”, International Journal of Electrical and Electronics Engineering and Telecommunications, Vol. 2, No. 3, July 2013, ISSN:2319-2518,pp 49-55. .(i.f.0.384)

23. K.Padmapriya, Deepti ”Design and Verification of VLSI Based AES Crypto Core Processor Using Verilog HDL”, IJESRT In May,2013 Issue, ISSN:2277-9655,pp- 1177-1181.( I.F.3.785)

24. K.PadmaPriya,Gopi,”Redundancy Efficiency cross talk avoidance scheme in VLSI circuits”, I International Journal of Computer & Organization Trends –Volume3 Issue4 – May 2013, ISSN: 2249-2593,pp 80-83.(i.f. 1.190)

25. K.PadmaPriya,”Low power bus coding technique for minimizing capacitive crosstalk in DSM technology”, Vol2,No.2, International Journal of Advanced Technology & Engineering Research, May 2013, ISSN:2277-9655,pp.43-48.( i.f.0.533)

26. K.PadmaPriya, “Wire redundancy in bus encoding techniques for forbidden transitions free crosstalk avoidance CODEC designs”, International Journal of Advanced Technology & Engineering Research, May 2013 issue, ISSN:2277-9655.pp.60-64.( i.f.0.533)

27. K.Padmapriya ,CH Pavan Kumar,”Voltage and frequency scaling in Low power VLSI Circuits” International Journal of Engineering Sciences & Research Technology, May 2013, issue,ISSN:2277-9655-PP-1080-1087.( i.f.0.533)

28. K.PadmaPriya, “Bus effects in Deep Sub-micron Technology and methods to reduce Coupling effects, for International Journal of Electrical and Electronics Engineering and Telecommunications, April 2013 issue, ISSN: 2319-2518.pp-81-89.(i.f.0.384)
29. K.Padmapriya,” Modified Bus Invert Technique for Low Power VLSI Design in DSM Technology, Vol2, No.2, International Journal of Advanced Technology & Engineering Research, April 2013 issue, ISSN:2277-9655.pp.54-57. .( i.f.0.533)

30. Hussain, K.PadmaPriya, “Test Pattern Generator (TPG) for Low Power Logic Built In Self Test (BIST)”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering,Vol. 2, Issue 4, April 2013,pp.1634-1640. (i.f.5.016)

31. K.PadmaPriya, “ Low Power Bus Encoding for Deep SubMicron VLSI Circuits, International Journal of Advanced Technology & Engineering Research, April 2013 issue, ISSN:2277-9655,pp-68-72.(if.3.785)

32. K.Padmapriya,”Performance Analysis On SNR, BW, SSP, UBF, LBF To Get Acceptable Bit Error Rate To Improve Power Efficiency And Channel Capacity”, International Journal of Engineering Research & Technology, Vol. 2 Issue 3, March - 2013 ISSN: 2278-0181,pp.1-7.

33. K.Padmapriya, “High Speed FSM-based programmable Memory Built-In Self Test (MBIST) Controller” published in Volume 2 Issue 2, February 2013 of International Journal of Computer Science and Mobile Computing., pg46-52, (if.4.277)

34. K.PadmaPriya,” High performance Level Conversion Flip Flop for Dual Supply Systems” International Journal of Computer Trends and Technology- volume4, Issue2- 2013,pp.132- 134.(if1.517)

35. CH.SunilKumar, K.Padma priya, ”Implementation of Concurrent on line MBIST for RFID Memories”, International Journal of Computer Technology and Applications,Vol3(4),1587-1592,ISSN:2229-6093,July-August 2012.(if.2.804)

36. P.Murali Krishna, K.Padma priya “Remote Wireless Health Care Monitoring System Using ZIGBEE” International Journal of Engineering Research & Technology , Vol. 1 Issue 6, August – 2012, ISSN: 2278-0181,pp.1-3(if.1.76)

37. Doddabasavana Goud.B, K.Padma Priya, Nagabhushana Katte, ”A Review of Recent Advances in Separation and Detection of Whole Blood Components” International online journal "World Journal of Science and Technology", May,2012, 2(5):05-09.(if.0.46)

38. G.Venkateswarlu,Dr.K.PadmaPriya”A perfect Reconstruction of Discrete Valued Signals by using Equilizations Methods”,International Journal of Electronics and Communication Technology, Vol2,SP-1,Dec 2011, pp160-164.(if.1.2456)
39. P.Ramesh,V.Usha shree, .K.Padmapriya, “Implementation of High capacity Image Steganography”International Journal of Computer Applications in Engineering Sciences special issue on Computer networks & security Vol I.July 2011,pp. 286-293.(if.2.2)

40. P.Ramesh, Dr.V.Usha shree, Dr.K.Padma priya, “ Hiding data in Audio Using Audio Steganography” International Journal of Computer Applications in Engineering Sciences ,Vol I Issue II, june 2011,pp. 207-211 .(if.3.12)

41. Mohammed Aslam.C, SatyaNarayana.D, Padma Priya.K "Blood Vessel Segmentation in Angiograms using Fuzzy Inference System and Mathematical Morphology" International Journal of Computer Applications in Engineering Sciences, Volume I, Issue IV, December2011.(i.f.3.12)

42. K.Padma priya,CH.D.V.Paradesi Rao, “An Equivalence Algorithm for Reduction of DSM Bus Transitions”, Technology Spectrum Journal of Jawaharlal Nehru Technological University, ISSN:0974-6854Aug, 2008, pp.88-93.

43. K.Padma priya,CH.D.V.Paradesi Rao, “An Exclusion and Equivalence Algorithm for Reduction of Bus Transitions in Low power VLSI”,I managers, International journal on Software Engineering, Vol 2,No. 3,Jan-March 2008.

44. K.Padma priya, CH.D.V.Paradesi Rao, “An Exclusion Algorithm for Reduction of Bus Transitions in Low power VLSI”, International Engineering Technology, journal of Information systems, Vol. 2, Nov 2008, pp.84-88.

45. Srinivas, Ramanaiah, K.Padmapriya”A Novel High performance dynamic voltage level shifter” ARPN journal of Engineering and applied sciences,Vol 10, No.10, June 2015, ISSN:1819-6608,pp.4424-4429.

Session Chair/Keynote Speaker/Guest Lecture:1. Acted as a resource person in a work shop in “Low Power VLSI Design” conducted by Mahaveer Institute of Science and Technology, Hyderabad,22nd March2007.
2. As a session chair in FESTIVITIES-2K11, A national level youth festival,11-12,March,2011, Vagdevi Institute of technology & Science, Proddutur.
3. As a session chair and key note lecture A national level students technical paper presentation contest on 10-09-2011. RSR Engineering college,Kavali.
4. As a session chair Technical Symposium Scintillace 2K-11,September 23-24, 2011. JNTUACE,Pulivendula.
5. As a session chair Technical Symposium EVINCE2K-12,14-3-2012 ,SKU college of Engineering,SKUniversity,Anantapur
6. As a session chair Technical Symposium,E-Merge-2012,Feb 23-24,2012 JNTU A Collecg of Engineering, Anantapur.
7. A guest lecture in “New advancements in the field of communication” on 6-11-2011. Rao Bahadur Y.Mahabaleswarappa Engineering College, Ballery.
8. A guest lecture in “New trends in Low power VLSI” on 24-10-2010. Rao Bahadur Y.Mahabaleswarappa Engineering college, Balleryguest lecture.
9. A guest lecture in “Low Power VLSI concepts”, 28-8-2011 NRI Institute of Technology,Visadala,Guntur.
10. A guest lecture in Low Power VLSI Techniques, on 4-3-2013,Narsaraopeta Engineering College, Narsaraopeta,Guntur district, AP..
11. As a session chair for “Student Technical Paper Presentation in Geneces”,GECFEST’14 , on 30-1-2014, Gudlavalleru Engineering College, Gudlavalleru.

12. A guest lecture in “Power Reduction in VLSI Design”, on 13-11-2014,,Dr.Samuel George Institute of Engineering and Technology, Markapur.

13. As a session chair for a National conference on “Recent Trends in Electronics and Communication Engineering (RTECE- 2014) on 14’th -15’th, March 2014, JNTUKUCE,Vizianagaram.

14. A guest lecture in “Low Power VLSI Techniques”, on 13-11-2014,A.M.Reddy Memorial College of Engineering and Technology, Narsaraopeta.
1. Acted as 15. Acted as a resource person in a National Level Technical Symposium in “TECHNOSTRIED2K16” conducted by SSN Engineering College, Engineering College, Ongole, on 24-02-2016.
16. As a session chair for a National Level Technical Symposium in “ESPARKX2K16” conducted by ECE Department,JNTUK UCE,Kakinada during 27-28, Feb 2016 .
17. As a Resourse person for one week work shop ”Recent Advancements in VLSI Technology and Design Using EDA Tools”20-24, July,2016, JNTUKUCE, Kakinada.



R&D Projects:nil
Ph.D Scholars guided:7- going
PG Scholars guided :16
Positions held :Head of the Department from 14/07/2016 to till date.
Honors & Awards:nil
Patents :nil