pushpalatha pondreti

Mrs.pushpalatha pondreti

assistant professor
Department:Electronics and Communication Engineering
Qualification:M.Tech, (Ph.D)
Phone(Office):9705510601
Mobile:9705510601
Email:pushpalatha86@gmail.com
Date of Birth:09/08/1986
Date of Joining:02/01/2013
Subjects Taught:VLSI Design, Pulse and Digital Circuits, Digital System Design & Digital IC Applications, Digital Logic Design, Digital System Design, DSP Processors and Architectures, Embedded Systems, Advanced Digital Signal Processing, Digital IC Applications
Research Area:VLSI Design
Teaching Experience:6 years
Research Experience:3 years
Industry/Professional Experience:Nil
Personal Webpage :
Google Scholar link:
Staff Image

[1] P.Sowjanya, P.Pushpalatha, “transposed form fir filter Implementation Using Reconfigurable Architectures”, International journal of engineering research and technology(IJERT, volume 2, Issue 8(Auguest-2013).
[2] Sekhar, P.Pushpalatha, “Low power design of Johnson counter using DDFF featuring efficient embedded logic and clock gating”, International journal of engineering research and general science (IJERGS, volume 2, Issue 5(2014). Impact factor--- 3.843
[3] Shaik kouser rashmi, P.Pushpalatha, “Low power area efficient parallel FIR implementation using fast FIR algorithmic strength reduction technique with carry skip adder”, International journal of scientific engineering and technology research(IJSETR, volume 4, Issue 35(2015 AUGUST). Impact factor--- 3.462
[4] P.Bala kishore, Mrs. P. Pushpa latha “An FPGA Implementation of Faster Compression of the Partial Product Array in Two’s Complement Multiplier” International Journal of Advanced and Innovative Research (2278-7844) / # 217 / Volume 2 Issue 9, September 2013.
[5] B Prasanthi , P.Pushpalatha “Design of Low-Voltage and low-Power inverter based Double Tail Comparator” International Journal of Engineering Research and General Science Volume 2, Issue 5, August-September, 2014 ISSN 2091-2730.
[6] G.DEVI SUDHARANI , P. PUSHPALATHA , M.RAMKUMAR, “ARCHITECTURE OF PREFIX ADDER FOR IMPLEMENTATION OF FIR FILTER AND VERIFICATION USING UVM”, International Journal of Engineering Research-Online A Peer Reviewed International Journal Articles Vol.3., Issue.6., 2015 (Nov.-Dec.,).

Workshops/Courses Attended:1) Workshop on “Outcome Based Engineering Education” held on 05th Feb, 2013 at UCEK, JNTUK, Kakinada.
2) Workshop on “Advanced VLSI Technology (NWAVLSIT 2013) ” organized by Department of ECE, UCEK, JNTUK, Kakinada during 26th -27th April, 2013.
3) Workshop on “Communications, Signals, Image Processing (COSIP-2013)” during 28TH – 29TH June, 2013 at University College of Engineering, Vizianagaram.
4) Workshop on “Orientation programme for new faculty” organized by Directorate in association with INDO US collaboration for Engineering Education (IUCEE) during 13th-14th July, 2013.
5) Workshop on “Turnitin – An Anti Plagiarism software” on 24th January, 2014 at JNTUK.
6) Workshop on “VLSI & EDA Tools (VLSI-2014)” during 6th – 7th February, 2014 at University college of Engineering, Vizianagaram.
7) Workshop on “Teaching Communication Skills” Organized by the Directorate of Faculty Development, JNTUK on 1st March 2014 in association with Global Minds Consultancy Hyderabad.
8) Workshop on “Advanced Microcontrollers with Arduino (NW-AMC 2015)” held on 23rd and 24th July 2015 at JNTUK, Kakinada.
9) Workshop on “Management Capacity Enhancement Programme for Administrators” during 5th – 9th October, 2015 at IIM Lucknow, Noida Campus.
10) Workshop on “Building Embedded Systems with ARM Cortex –M MCUs” on 18th and 19th December 2015 at JNTUK, Kakinada.
11) Workshop on “Improving the Presentation Skills in Teaching” at JNTUK Kakinada on 17th November, 2016.

SHORT TERM COURSES ATTENDED:
1) Short term course on “Advances in VLSI Signal Processing” offered by IIT Kharagpur on 3rd July 2013.
2) Faculty Development Programme on “VLSI Design” at VNRVJIET, Hyderabad during 20th May – 1st June 2013.
3) Refresher course on “Intellectual Property Rights and Patents” during 16th – 30th May, 2016 at JNTUK, Kakinada
4) Refresher course on “Research methodologies” during 1st – 15th May, 2016 at JNTUK, Kakinada.
5) Short term course on “Cognitive Radio and Wireless Communication-Teory , Practice and Security” during 1st-10th September,2016 at IIT Kanpur.
6) Short term course on “Orientation Programme” held during 4th to 31st December, 2014 at UGC-Academic Staff College, MANUU, Hyderabad.
Workshops/Conferences Organized:1) Conducted One week National Workshop on “Recent Advancement in VLSI Technology and Design Using EDA Tools (VLSITP-2016)” during 20th – 24th of July, 2016, at University College of Engineering Kakinada, JNTUK, Kakinada.
2) Conducted Two day Workshop on “Autonomous Robotics & Embedded Systems” during 22nd and 23rd of August, 2015, at University College of Engineering Kakinada, JNTUK, Kakinada.
3) Conducted National level technical symposium during Feb 28 & March 1, 2015 at University College of Engineering Kakinada, JNTUK, Kakinada.
4) Conducted Two day National Workshop on “Advanced VLSI Technology (VLSIT-13)” during 26th – 27th of April, 2013, at University College of Engineering Kakinada, JNTUK, Kakinada.
Book Chapters/Books Authored:Nil
Conferences:[1] P.Pushpalatha , J.Lakshmana Kumar , P.V.Muralidhar, “Power reduction technique for content addressable memory circuit”, International Conference on Ameliorations in Communications & Power Engineering(ICACP-12).
[2] M.Suneela, P.Pushpalatha, “ Design of Area Efficient Low Power CMOS Fulladder Using 32NM Technology”, International conference on Electrical,Electronics and Computer Engineering(ICEECE – 2013).
[3] Arunadevi Jawahar, P.Pushpalatha, “Implementation of High-Order FIR Digital Filtering For Software Defined Radio Receivers”, International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES-2016).
[4] Vaka Saranya, P.Pushpalatha, “Implementation of Multiplier Architecture Using Efficient Carry Select adders for synthesizing FIR filters”, International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES-2016).
National Conferences:
1. K.Aruna, P.Pushpalatha, “ VLSI Implementation and Optimization of CAM with a gated power ML sense amplifier”, national conference on VLSI Design, Signal Processing, Image Processing, Communications & Embedded Systems(VSPICE2K15).
Session Chair/Keynote Speaker/Guest Lecture:1 Session Chair for NCVSPICE-2K15 on 6-7,November 2015 at ECE Department, UCEK, JNTUK,KAKNADA
2 Session Chair for Paper presentation ESPARX 2K15 28 Feb& 1 Mach 2015 at ECE Department, UCEK, JNTUK,KAKNADA
R&D Projects:Nil
Ph.D Scholars guided:Nil
PG Scholars guided :8
Memberships in Professional bodies:IETE
Positions held :Deputy Warden
Honors & Awards:Nil
Patents :Nil
Foreign Visits:nil